Definition
Plain language
A combined power-and-speed score for a chip design, where lower is better.
As stated in the literature
A hardware metric multiplying energy consumption by execution delay, used as a single objective for accelerator-design optimization; the reward signal in the Economy of Minds chip-design domain.
Why it matters: It matters because it folds two competing hardware goals into one number that an optimizer can chase without trading speed for power blindly.
For example, when comparing two chip designs, the one with the lower energy-delay product wins by using less power and running faster at the same time.
Heard on the show
“Designing the layout of an AI accelerator — how you schedule computation and move data around on the chip — to minimize what they call energy-delay product.”Episode 107 — How a Market of Crippled AI Agents Outscored One Unrestricted Model